HVDC transmission has existed for decades but has recently become more important due to the growing need to connect renewable energy sources to existing AC voltage grids. Converter stations are required as the key link between these different systems and these rely on sophisticated equipment to perform the transformation while also dealing with the different voltage waveforms that occur. Surge arresters are used to protect this expensive equipment against overvoltage. To ensure that arresters offer a low protection level combined with stability in handling overvoltage stresses, exact voltage waveform has to be known. Yet it has proven highly challenging to accurately calculate the thermal behaviour of an arrester. A test laboratory therefore has to create these different voltage waveforms so that an arrester’s energy absorption capability can be demonstrated according to methods prescribed in the standards. Bernd Kruska, Matthias Schubert and Reinhard Göhler of Siemens AG in Germany present an overview of this topic and describe how such tests are performed.
Surge arresters for DC applications are certainly not new and in fact by 1935 had already been supplied for nominal voltages of 250 V. At the time, the power system in parts of Germany, such as areas in Berlin, was often a DC voltage grid. Similarly, medium voltage system DC surge arresters are also not new. Fig. 1, for example, depicts a porcelain-housed arrester for 3 kV DC. Inside, a non-linear resistor based on silicon carbide (SiC) is switched in series with a spark gap system, whereby the gaps are magnetically blown to be able to quench the arc. Due to its symmetric double chamber, this arrester was able to handle positive as well as negative direct currents. Ohmic resistors helped divide the DC voltage evenly among the arc gaps. An important aspect of this design was that the SiC resistor, not being stressed with permanent resistive current, was not vulnerable to electrical ageing.
In 1986, the first metal-oxide resistor for an HVDC surge arrester was introduced. Since the 80 mm diameter MO resistors in this gapless arrester were stressed permanently by direct current, this was the first time these needed to be stable against electrical ageing caused by DC. A proprietary procedure was developed to verify stability of these resistors and used until an internationally accepted accelerated DC ageing test was established within the new IEC 60099-9 standard.
Due to past lack of international standardization, a CIGRE Application Guide from 1989 was long used as the basis for testing and dimensioning HVDC arresters. This document, created by Working Group 33/14.05, had the title: “Application Guide for Metal Oxide Arresters without Gaps for HVDC Converter Stations”. In 2014, the first international standard for “HVDC arresters” was established, i.e. IEC 60099-9, Edition 1.0 2014-06 Surge arresters – Part 9: Metal-oxide surge arresters without gaps for HVDC converter stations. This standard represented an important step in unifying all the tests required on surge arresters for HVDC applications. Nevertheless, laboratory testing HVDC arresters remains a challenge due to the special voltage waveforms that have to be generated.
Long-Term Stability Under Continuous Operating Voltage
The test to verify long-term stability under continuous operating voltage (described in Clause 9.11) is designed to determine if MO resistors show stable or decreasing power losses when energized at continuous operating voltage and is one of the most important in the new IEC standard. Clause 9.11 describes two different kinds of accelerated ageing procedures: the far simpler is for surge arresters stressed with a voltage that never changes polarity; the more sophisticated is for arresters that are stressed with a voltage that changes polarity, even if this occurs only once in three years. In both cases, power loss at the start of the 1000 h test (P0) has to be measured and becomes an important reference in determining test results. Due to the fact that rate of power loss decrease during the first hours is relatively fast, this is important when measuring P0. According to IEC 60099-9, this has to be done within 30 min and 1 hour after test voltage is applied. Measurement after 30 minutes will result in a higher reference point than measurement after an hour and therefore precise moment when P0 is measured influences cases where the test just fails or just passes.
MO Resistor Long-Term Stability Test with Voltage Reversal
Fig. 3 shows results of an accelerated ageing test with polarity reversal after 24 h, 72 h, 168 h and 360 h. 30 minutes after this change, power loss was measured (i.e. P2, P4, P6 and P8). The test is successful and considered passed if these measurements and power loss after 1000 h (P9) are lower than 1.1 times power loss at the beginning (i.e.P0). In the past, results for P2 until P9 were often higher than 1.1 times P0 and R&D work focused on reducing power loss after polarity reversal to a low level. Measuring power loss after 30 minutes is based on the common operating practice at HVDC converter stations to conduct polarity reversal relatively slowly using a ramp function within about 30 minutes. This is to avoid failures based on material polarization caused by the DC voltage.
Complex Waveforms for Arresters at HVDC Stations
In a typical converter station having two 12-pulse converter bridges per pole, there are about 20 different positions for surge arresters and most have different voltage waveforms. One of these positions is called V, which stands for valve arrester. Valves of pulse bridges are expensive components and limiting overvoltage on these will significantly reduce cost of the converter bridge. On one hand, low protection level of a surge arrester will effectively absorb overvoltage across the valves. On the other hand, the arrester itself will be stressed more if protection level is low. For low protection level, influence of voltage waveform on the arrester’s energy absorption capability is essential. Valves of HVDC converter pulse bridges are stressed with highly complex waveforms (an example of which is shown in Fig. 4).
Apart from the mix of AC and DC voltage components, two parts of this waveform are important for a surge arrester: a) steepness of the voltage change; and b) peak of the continuous applied voltage (PCAV).
In IEC 60099-9, PCAV is called PCOV (peak value of continuous operating voltage) and has its origin mainly in the commutation overshoot of thyristor valves.
Effect of Complex Waveforms on Surge Arresters
Surge arresters reduce the height of the commutation overshoot and, the lower an arrester’s protection level, the lower will be the PCOV. But, at the same time, the lower the protection level, the higher the stress and resulting heat build up in the arrester. Another important detail regarding PCOV is energy content of the voltage overshoot. Using the same arrester, overvoltage with low energy content can be reduced much more than overvoltage with high energy content. Another way to say this is that to reduce overvoltage to a certain level, surge arresters with high-energy absorption capability are needed in cases where energy content of the overshoot is high. Besides overvoltage amplitude, steepness of voltage change also has an influence on the arrester. In general, power losses of a gapless MO surge arrester increase significantly with frequency, i.e. the faster the voltage changes, the greater the heating up of the arrester.
Creating Complex Waveforms in Test Laboratory
To allow optimized dimensioning and application of surge arresters, it is essential to be able to generate complex waveforms in a test laboratory. The voltage generator must have a large DC frequency range to a minimum of 10 kHz as well as the capability to drive the current. Due to commutation overshoots, output current can be in the range of 100 mA to a couple of amps, depending on how much the arrester affects commutation overshoots. One option is to use a commercial high voltage power amplifier designed to provide precise control of output voltages (e.g. with fixed gain of 1000 V/1 V).
That kind of device comes at high cost and Fig. 5 describes another circuit enabling an overlay of AC and DC voltage. First of all, the complex voltage waveform has to be provided as a readable value table (e.g. in Excel format), obtained either from modelling or by actual measurements. Then, voltage waveform is analyzed using specialized software for deviation of its AC and DC components. The test stand consists of two separate transmission paths, one for the AC and the other for the DC component of the test voltage.
The AC component can be streamed by the software to a D/A converter card that provides input voltage for a power amplifier (1000 VA, output voltage maximum 270 V) as an analogue voltage signal, with a typical level of 0-10 V. Subsequently, output voltage of the amplifier is used to supply a wide frequency band voltage transformer that provides the AC component of the test voltage at the required voltage level for the test sample (i.e. the metal-oxide block). In general, the voltage transformer cannot transfer the DC component of the complex waveform voltage and this is the reason for the separation of the two components in the first place. The DC component would cause saturation of the transformer by pre-magnetization.
Therefore, a high voltage DC voltage source is integrated, potential free, in the high voltage path of the test circuit generating the DC component of the test voltage. Consequently, the power amplifier must be configured to provide only the AC component of test voltage. Moreover, the DC voltage source has to be protected against the AC voltage source by an LR filter (e.g. consisting of inductivity Ldc in series with resistor Rdc). The LR filter is designed as high impedance for the AC voltage source. To close the circuit for the AC voltage source, a capacitor Cac with low impedance for the power frequency voltage is integrated. On the other hand, the DC circuit is closed over the test sample and the LR filter. Because of the high impedance of the test sample, the direct current is limited and saturation of the transformer is avoided. In general, the impedances of all passive components that are part of the circuit are low compared to the impedance of the test sample. Thus, it is ensured that most of the voltage drop occurs on the test sample, as desired.
Analyses of different valve voltage waveforms indicate that the DC component of the voltage is less than 1.5 times the fundamental power frequency voltage. Thus, a DC source with voltage level of 1.5 times the power frequency voltage source (rms) is sufficient. Both voltage transmission paths and required measurements can be controlled by software. The response characteristic of voltage transmission paths can be improved by the software in case of deviations caused by transmission losses or resonances at higher frequency. As an extension, automation with integrated temperature measurement and an oven to heat the test sample to temperatures required according to IEC 60099-9 (2014), section 11.2.3 makes it possible to determine the ECOV (equivalent continuous operating voltage).
Surge Arrester Housings for HVDC Converter Stations
Surge arresters are used in different locations at HVDC converter stations and various housing solutions can be applied (e.g. see Fig. 6 showing valve arresters). For example, the typical housing for a V-arrester is an FRP-tube with silicone sheds. Due to the fact that cooling of metal-oxide resistors in such a tube design is not that effective, so-called high cooling arresters without closed housings have recently been placed into service (see Fig. 6, right). Here, the MO resistors are individually covered by a silicone shed and an aluminium part with cooling rips is placed between each. The active part of the arrester is braced with long rod insulators and air in the converter hall directly cools the aluminium parts such that a higher equivalent continuous operating voltage (ECOV) can be applied, i.e. energy absorption capability is increased compared with arresters that have closed housings.
There is growing experience with polymeric-housed surge arresters for DC, both for inside and outside applications, and thousands of such arresters are already in service. During the past few years there is also discussion on possible need for different shed profiles for DC versus AC application, although there are no reports of failures under DC stress of arresters having AC profiles.
Surge arresters at HVDC converter stations are essential components to reduce damage from overvoltage. The highly complex voltage waveforms in such stations are a challenge regarding optimization of surge arresters. Low protection levels of these surge arresters significantly help in reducing amount of thyristor valves and thereby the total cost of a converter station. Modern power electronics are used successfully in a test laboratory to create different kinds of complex waveforms to determine the equivalent continuous operating voltage (ECOV) for type testing surge arresters according to IEC 60099-9.